Si-Ware Systems Amps Performance for Ossia–s Cota(R) Transmitter
Transmitter Chip Provides 4X the Power
Atomera to Present at the 18th Annual B. Riley & Co. Institutional Investor Conference
LOS GATOS, CA — (Marketwired) — 04/10/17 — Atomera Incorporated (NASDAQ: ATOM), a semiconductor materials and intellectual property licensing company focused on deploying its proprietary technology into the semiconductor industry, announced today that it will be presenting at the following investor conference.Management will present at the B. Riley & Co. Institutional Investor Conference on Thursday, May 25, 2017 in Santa Monica, CA at 8:00 am pacific time. The presentation will be broad
GL Communications Inc. Selects Achronix Speedster22i FPGAs for 10/40/100G PacketExpert(TM)
SANTA CLARA, CA — (Marketwired) — 03/22/16 — Achronix Semiconductor Corporation today announced that GL Communications Inc. selected the Achronix Speedster22i HD1000 FPGA for its 10/40/100G PacketExpert Ethernet tester, a hardware-based test instrument suited for the installation, troubleshooting and comprehensive testing of Ethernet/IP networks.The Speedster22i devices are the only FPGAs shipping in production that contain embedded hard IP targeted at high-performance wireline networking ap
eSilicon–s Javier DeLaCruz to Present: Cost Structure Advantages of 2.5D Integration
SAN JOSE, CA — (Marketwired) — 04/29/15 –Javier DeLaCruz, eSilicon–s senior director of product strategyHoliday Inn Conference Center
242 Adams
Boxborough, Massachusetts 01719May 5, 2015
10:40 AMVarious market dynamics are influencing the adoption of 2.5D integration. Recent developments have enabled 2.5D to provide feature enhancements, but if applied well may also provide significant cost benefits over what can be otherwise executed.As a senior director of product strategy at eSilicon Cor
eSilicon–s Prasad Subramaniam to Be Featured Presenter and Panelist at IEEE EDPS
SAN JOSE, CA — (Marketwired) — 04/20/15 –Monterey Beach Resort
2600 Sand Dunes Drive
Monterey, California 93940April 23-24, 2015
Day two: Low Power DesignPrasad Subramaniam, eSilicon
vice president of R&D and design technologyLow-Power Design MethodologiesLow Power Panel: Low Power Tools, Techniques & and Verification: Brian Fuller, CadenceBernard Murphy, AtrentaSteve Carlson, CadencePrasad Subramaniam, eSiliconPat Sheridan, SynopsysTom Quan, TSMCThe Electronic Design Process Symposi
eSilicon Webinar Series: From Medical and Wearables to Big Data: Differentiated IP for the IoT Spectrum
Customizing Memory IP for IoT Applications; Presented in Japanese, Korean and Mandarin
eSilicon Promotes Ajay Lalwani to Vice President, Global Manufacturing Operations
Semiconductor Industry Veteran Facilitates Company Growth
eSilicon Webinar: Winning the IoT Race With the Right Chip
Customizing Memory IP for IoT Applications
Telesoft Technologies Selects Achronix Speedster22i FPGAs for Dual 100GbE MPAC6200
SANTA CLARA, CA — (Marketwired) — 01/20/15 — Achronix Semiconductor Corporation today announced that Telesoft Technologies has selected Achronix Speedster22i HD1000 FPGAs for the MPAC6200, industry–s first dual 100GbE PCIe card for cyber security, monitoring and analytics.Based on Intel–s 22nm Tri-Gate technology, Speedster22i devices contain a wide range of embedded hard IP including 100G Ethernet, Interlaken, PCI Express Gen3 with integrated DMA engine and DDR3. This range of hard IP, co
Sunflower Mission Awards 54 University Scholarships to Vietnam–s Future Engineers
Texas-Based Organization Has Delivered Over 12,000 Scholarships to Vietnamese Students