eda Archives - Page 4 of 13

Cadence Offers Secure Digital 4.0 Host Controller IP Core

By Publisher on September 16, 2013 Networking, Picture Gallery

SAN JOSE, CA — (Marketwired) — 09/16/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS)Highlights:Increases SD memory card interface performance to 312MB/sFastest IP solution available today, supporting Default, High and Ultra-High SpeedsSupports both removable and embedded memoryCadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the immediate availability of its Secure Digital (SD) 4.0 Host Controller Intellectual Property (IP) core,

Cadence Mixed-Signal Low-Power Design Flow Helps Silicon Labs Cut New MCU Power Consumption in Half

By Publisher on September 12, 2013 Networking, Picture Gallery

SAN JOSE, CA — (Marketwired) — 09/12/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS)Highlights:Integrated Cadence low-power flow enabled development of new Wonder Gecko microcontroller, which uses 50 percent less power than competitive offeringsThe MCU was developed by Energy Micro, now part of Silicon Labs, which has been using the Cadence flow since its inception in 2007 to create nearly 250 ARM-based MCUsCadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design in

Cadence Launches Palladium XP II Verification Platform and Enhanced System Development Suite

By Publisher on September 10, 2013 Hardware, Picture Gallery

SAN JOSE, CA — (Marketwired) — 09/09/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS)Highlights:Palladium XP II platform delivers 2X increase in verification productivity, resulting in up to four months faster time to marketEnhanced System Development Suite delivers up to 60X speed-up for embedded OS verification and 10X performance increase in hardware/software verificationIn a move to further reduce time to market for both semiconductor and system manufacturers, Cadence Design Systems, Inc

Dialog Semiconductor Licenses Cadence-s Industry-Leading Tensilica HiFi Audio/Voice DSP IP

By Publisher on September 9, 2013 Picture Gallery, Software

Semiconductor Company to First Utilise the IP for Development of Next-Generation Connectivity Products

Cadence Announces Industry-s First Verification IP for HDMI 2.0

By Publisher on September 6, 2013 Networking, Picture Gallery

Support for New High Definition Video Format Enables Development of Next Generation TVs

SMIC Adopts Cadence Digital Flow With Advanced Features for Improving Area, Power and Performance

By Publisher on September 4, 2013 Networking, Picture Gallery

SAN JOSE, CA — (Marketwired) — 09/04/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS)Highlights:SMIC-s new 40nm Reference Flow 5.1 incorporates the state-of-the-art Cadence CCOpt and GigaOpt technology and the Tempus Timing Signoff SolutionThe new RTL-to-GDSII digital flow supports the Cadence hierarchical low-power flow and the latest version of the Common Power Format (CPF)Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, and Semiconductor Manufa

ARM Acquires Advanced Display Technology From Cadence

By Publisher on September 3, 2013 Networking, Picture Gallery

Cadence and ARM Deepen Collaboration on High-End Mobile Device Development

Cadence Palladium XP Platform Chosen by Mellanox Technologies to Shorten Development Time of Interconnect Products

By Publisher on August 29, 2013 Networking, Picture Gallery

Cadence Palladium XP Platform Enables Mellanox to Accelerate System Integration by Effectively Accelerating Hardware and Software Integration

Cadence Senior Vice President and Chief Financial Officer Geoff Ribar to Present at the Deutsche Bank Technology Conference

By Publisher on August 28, 2013 Picture Gallery, Software

SAN JOSE, CA — (Marketwired) — 08/28/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS)Geoff Ribar, senior vice president and chief financial officer, Cadence Design Systems, Inc. (NASDAQ: CDNS)Geoff Ribar will speak at the Deutsche Bank Technology Conference at The Cosmopolitan of Las Vegas. Ribar will participate in a fireside chat and question and answer session with analysts and investors.Ribar-s address will be available live via on-demand webcast at 4:10 p.m. PDT on Wednesday, Sept. 11,

Renesas Licenses Cadence-s Tensilica ConnX D2 DSP for Next-Generation IoT Chip

By Publisher on August 28, 2013 Picture Gallery, Software

SAN JOSE, CA — (Marketwired) — 08/28/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that as part of their initiative, Renesas Electronics Corporation has licensed the Tensilica (digital signal processor) for a next-generation chip designed for Internet of Things (IoT) applications. Combined with the special acceleration packages optimized for IoT wired and wireless modem standards, the ConnX D2 DSP was selected because it