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FPGAs and Embedded Processors Technical Course

Starnberg, November 3, 2009 – qaqadu event gmbh, the experts for technical education, offer the 3-day short course on “FPGAs and Embedded Processors” taking place on December 7 to 9, 2009, in Munich, Germany. Offering this topic qaqadu events meets the rapidly growing market of FPGAs and embedded processors with great market potential. This course will provide attendees with a comprehensive overview of how embedded styled systems can be implemented within a Field Programmable Gate Array (FPGA) and discuss how FPGAs can be used as a platform for System-on-Chip (SoC) styled designs. An introduction to FPGAs and their DSP capabilities will be presented along with a detailed overview of the embedded processor and connectivity options that are available. The course has a significant practical element to show to the attendees how to implement simple hybrid software/hardware DSP algorithms. Attendees will develop existing Intellectual Property (IP) cores into hardware co-processors and combine these with soft processor cores using the various connectivity options available. Hardware/software debugging techniques will also be presented and demonstrated.

The suggested audience consists of Digital, DSP, FPGA/ASIC and Software engineers who want to learn how embedded systems may be designed and implemented within FPGA technologies. The course assumes that attendees have previous experience in digital hardware and software design to Bachelor level. Although not essential, attendees would also benefit from prior experience in working with microprocessors and/or microcontrollers as well as a basic understanding of C. Detailed knowledge of Hardware Description Languages is not required. Special attention is paid to practical experience; after each presentation a hands-on session will follow in which attendees will be able to simulate and implement the structures and architectures introduced. All attendees will receive electronic and printed versions of the teaching materials. A DVD containing all the simulation models used during the course will also be distributed. This course will be led by the team of Professor Bob Stewart and integrates presentations and design sessions from other experienced design engineers from Steepest Ascent.

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