SAN JOSE, CA — (Marketwired) — 03/31/15 — , the leading SPICE modeling, giga-scale SPICE simulation and Design-for-Yield (DFY) solution provider
Will demonstrate NanoSpice Giga, a fast and accurate SPICE simulator for memory verification and signoff with the capacity to handle one-billion elements, at the North America TSMC 2015 Technology Symposia in San Jose, Calif., Boston and Austin, Texas. Fully compatible with SPICE and FastSPICE, NanoSpice Giga offers accurate timing, power and leakage for memory IP and full-chip verification, and memory characterization.
Tuesday, April 7
San Jose McEnery Convention Center, San Jose, Calif.
Tuesday, April 14
Boston Marriott Burlington, Burlington, Mass.
Thursday, April 16
Hilton Austin, Austin, Texas
For more information about ProPlus Design Solutions, visit
Details on the TSMC 2015 Technology Symposia can be found at:
delivers Electronic Design Automation (EDA) solutions with the mission to enhance the link between design and manufacturing. As the SPICE modeling solutions leader and leading technology provider of giga-scale SPICE simulation and design for yield (DFY) applications, it provides unique DFY solutions integrating the most advanced device modeling, a high-performance parallel SPICE simulation engine and hardware-validated variation analysis technologies. Founded in 2006, ProPlus Design Solutions has R&D centers in San Jose, Calif., Beijing and Jinan, China, and offices in Tokyo, Japan, Hsinchu, Taiwan, and Shanghai, China. More information about ProPlus Design Solutions can be found at .
BSIMProPlus, Model Explorer, NanoExplorer, NanoSpice, NanoYield and NoisePro are registered trademarks of ProPlus Design Solutions. ProPlus Design Solutions acknowledges trademarks or registered trademarks of other organizations for their respective products and services.
For more information, contact:
Nanette Collins
Public Relations for ProPlus Design Solutions
(617) 437-1822
You must be logged in to post a comment Login