MEDIA ALERT: Silvaco Celebrates 30 Years as a Leader in EDA Industry at 52nd DAC

SANTA CLARA, CA — (Marketwired) — 05/27/15 —

Silvaco, Inc. today announced that it plans to showcase the company–s full TCAD-to-signoff software solutions for vertical markets at Design Automation Conference (DAC) 2015.

10:00 AM – 7:00 PM

: 6:00 PM – 7:00 PM

10:00 AM – 7:00 PM

: 6:00 PM – 7:00 PM

10:00 AM – 6:00 PM

Visit Silvaco in booth #532 in the South Hall of Moscone Center.
747 Howard Street
San Francisco, CA 94103

Join us and our partners in celebrating Silvaco–s 30 years of innovating the technology behind the chip at DAC! Silvaco executives and technology experts will be at the Silvaco booth and at partner booths to discuss our broad product portfolio of TCAD-to-signoff solutions for a wide range of applications:

Displays: TFT, LCD, OLED

Power (High Voltage/Current): DMOS, IGBT, SiC, GaN, Switching Regulators

Reliability: Soft-Error Reliability (SEE), Radiation (Total Dose), Aging (NBTI, HCI)

Optical: CCD, CIS, Laser

Advanced Process Development: FinFET, FDSOI, 3D NAND Flash

Analog, High-speed I/O Design: PLL, ADC, SERDES

Foundation Library, Memory Design: Standard Cell, SRAM, DRAM, Flash

Silvaco experts will be conducting live, in-depth presentations and demonstrations showcasing our latest technology innovations — developed to enable our customers to reduce cost and time to market for their leading-edge designs — in the following key focus areas:

Power integrity signoff from block (analog, SRAM, custom digital) to full chip level, including:

Power

EM/IR

Thermal analysis

Full custom design flow, including:

Schematic entry

Layout

Simulation

Verification

Large portfolio of PDKs across many foundries with emphasis on AMS, HV, BCD and CIS processes

16nm and 10nm FinFET-ready Parallel SPICE simulator being extended to support FastSPICE applications

Automated SRAM characterization environment

3D parasitic RC extractor used for detailed and accurate FinFET SRAM extraction

SPICE modeling for large set of model types, including: HiSIM_HV for power devices and UOTFT for organic and oxide TFTs

Pixel and interconnect RC extraction for TFT displays

3D TCAD products used for large application space, including:

Rapid FinFET prototyping

Large structure parallelized simulations for multi-cell IGBTs

Robust, stable oxidation simulation for trench MOS power devices and CMOS image sensors

High precision SiC/GaN simulation

Advanced etch for 3D NAND flash, STT MRAM

SEE and total dose reliability simulation

Silvaco continues to collaborate with customers, partners and industry consortia to address and solve advanced technology challenges, and our participation and demonstrations in partner booths include:

Hear about our affordable TCAD-To-Signoff solutions at the TSMC Open Innovation Platform® Theater

Monday, June 8th at 3:45 PM

Tuesday June 9th at 5:00 PM

Wednesday June 10th at 11:15 AM

Check out Silvaco–s custom design flow in action on analog designs targeted at TowerJazz–s processes in our partner–s cloud environment

Attend the DAC Cocktails and Conversations held on the tradeshow floor in Moscone South Hall on Monday, June 8 and Tuesday, June 9 from 6:00 PM to 7:00 PM to help us celebrate Silvaco–s 30-year anniversary, and enter our drawings to win some raffle prizes! Visit our booth during the day, and find out how to enter!

More information about Silvaco activities at DAC 2015 can be found .

Silvaco, Inc. is a leading EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design. Silvaco delivers a full TCAD-to-signoff flow for vertical markets including: displays, power electronics, optical devices, radiation & soft error reliability and advanced CMOS process and IP development. For over 30 years, Silvaco has enabled its customers to bring superior products to market at reduced cost and in the shortest time. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia. .

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